1. Field of the Invention
The present invention relates generally to overlay measurement techniques, which are used in semiconductor manufacturing processes or system integration tests. More specifically, the present invention relates to overlay marks for measuring alignment error between different layers or different patterns on the same layer of a semiconductor wafer stack and the semiconductor process using the overlay marks.
2. Description of the Prior Art
As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have resulted in the development of three dimensional designs, such as a fin-like field effect transistor (FinFET). A typical FinFET is fabricated with a thin “fin” (or fin structure) extending from a substrate, for example, etched into a silicon layer of the substrate. The channel of the FET is formed in this vertical fin. A gate is provided over (e.g., wrapping) the fin. It is beneficial to have a gate on both sides of the channel allowing gate control of the channel from both sides. Advantages of FinFET devices include reducing the short channel effect and higher current flow.
Because of the complexity inherent in nonplanar devices, such as FinFETs, a number of techniques used in manufacturing planar transistors must be redesigned for manufacturing nonplanar devices. For example, mask overlay and alignment techniques may require further design efforts. ICs (integrated circuits) are typically assembled by layering features on a semiconductor wafer using a set of photolithographic masks. Each mask in the set has a pattern formed by transmissive or reflective regions. During a photolithographic exposure, radiation such as ultraviolet light passes through or reflects off the mask before striking a photoresist coating on the wafer. The mask transfers the pattern onto the photoresist, which is then selectively removed to reveal the pattern. The wafer then undergoes processing steps that take advantage of the shape of the remaining photoresist to create circuit features on the wafer. When the processing steps are complete, photoresist is reapplied and wafer is exposed using the next mask. In this way, the features are layered to produce the final circuit.
Regardless of whether a mask is error-free, if all or part of the mask is not aligned properly, the resulting features may not align correctly with adjoining layers. This can result in reduced device performance or complete device failure. To measure mask alignment, overlay (OVL) marks are formed on the wafer. Overlay marks typically consist of layers of material arranged in patterns that are both recognizable and that provide identifiable reference points. While existing overlay marks have been generally adequate for planar devices, they have not been entirely satisfactory for manufacturing nonplanar devices.
The measurement of overlay error between successive patterned layers on a wafer is one of the most critical process control techniques used in the manufacturing of integrated circuits and devices. Overlay accuracy generally pertains to the determination of how accurately a first patterned layer aligns with respect to a second patterned layer disposed above or below it and to the determination of how accurately a first pattern aligns with respect to a second pattern disposed on the same layer. Presently, overlay measurements are performed via test patterns that are printed together with layers of the wafer. The images of these test patterns are captured via an imaging tool and an analysis algorithm is used to calculate the relative displacement of the patterns from the captured images.
Although such designs have worked well, the overlay/alignment measurement is readily affected by the underlying patterns, such as fins or mandrels formed on the substrate, thereby the measurement noise and error are increased. This influence would be even worse when the overlay/alignment marks and underlying patterns have the same or similar orientation. Therefore, there are still continuing efforts for those ordinarily skilled in the art to provide a better alignment mark and measurement method with improved functionality and accuracy.